:: Tutorials
Voice conversion to add non-linguistic information into speaking voices (Tentative)
By Prof. Masato AKAGI
School of Information Science , Japan Advanced Institute of Science and Technology (JAIST)
1-1 Asahidai, Nomi, Ishikawa 923-1292, JAPAN
akagi@jaist.ac.jp; http://www.jaist.ac.jp/~akagi/
Tel. +81-761-51-1236, Fax. +81-761-51-1149


Two issues about voice conversion are presented. The first issue is conversion of speaking voice into singing voice, which is an important issue to investigate how singing-voices are perceived and generated, as a part of studies of non-linguistic information in speech sounds. Since most speech synthesis methods were not proposed for singing-voice synthesis but for spoken-voice synthesis, it is impossible to reveal how singing-voices are perceived and generated by using these methods. This talk shows the possibility of synthesizing a singing-voice by adding non-linguistic information into speaking voice. The second issue is conversion of neutral speech into expressive speech. Much of the earlier work has focused on the relationship between emotional speech and acoustic features that is characterized by statistics. The problem is that there lacks a model which takes the aspects of vagueness and human perception into consideration. In this talk, a three-layer model for the perception of emotional speech is introduced, that is, the topmost layer: five categories of emotion; the middle layer: human perceptual aspect; and the bottommost layer: acoustic features. Some demonstrations of synthesizing emotional speech are presented, using the perception model of emotional speech and a new voice conversion method based on temporal decomposition.

About speaker

Prof. Masato Akagi received the B.E. degree in electronic engineering from Nagoya Institute of Technology in 1979, and the M.E. and the Ph.D. Eng. degrees in computer science from Tokyo Institute of Technology in 1981 and 1984. In 1984, he joined the Electrical Communication Laboratory, Nippon Telegraph and Telephone Corporation (NTT). From 1986 to 1990, he worked at the ATR Auditory and Visual Perception Research Laboratories. Since 1992, he has been with the School of Information Science , JAIST, where he is currently a professor. His research interests include speech perception mechanisms of human beings, and speech signal processing. Dr. Akagi received the IEICE Excellent Paper Award from the Institute of Electronics, Information and Communication Engineers (IEICE) in 1987, and the Sato Prize for Outstanding Paper from the Acoustical Society of Japan (ASJ) in 1998 and 2005. He is currently a vice-president of the ASJ.


Wireless multihop networks - concepts, architecture and protocols
By Prof. Hiroaki Morino
Department of Electrical Communication
Shibaura Institute of Technology
morino@shibaura-it.ac.jp, morino@ieee.org
Tel/Fax : +81-3-5859-8254, Mobile : +81-80-505-61504


Wireless multihop networks formed by wireless access points with decentralized control receive attentions for the novel cost effective network technology. One of promising deployment among them is called wireless mesh networks, where multiple stationary wireless access points form multihop broadband backbone network for mobile terminals. Wireless mesh networks can cooperate with existing cellular network or wireless LAN to extend coverage area of them. Due to the shared use of limited wireless bandwidth and the need for support of mobile terminals, wireless mesh networks have some technical challenges especially in MAC protocols, routing protocols. This tutorial presents the overview of concepts, architecture and protocols of wireless mesh networks. In the data link layer, multiple access protocols for distributed fairness and QoS control, and capacity improvement by multiple channel configuration schemes are described. In the network layer, routing protocols are discussed in terms of the design of high throughput link metrics, terminal handover support, interconnections with the Internet and so on. From aspects of reliable end-to-end packet transport in the wireless environment, cross layer design issues are discussed. From viewpoints of network services, wireless mesh networks are expected to providing people with as local community network services, such as environmental information gathering and notification service after the occurrence of disasters. Recent researches on test beds and experiments aiming to realize these services are presented.

About speaker

Dr. Hiroaki Morino is currently assistant professor of Shibaura Institute of Technology, Japan. He receives B.E, M.E. and Ph.D from the University of Tokyo in 1994,1996 and 1999, respectively. His research interests include MAC protocols and routing protocols of wireless multihop networks, urgency information gathering and notification systems using wireless sensor networks, and reliable peer-to-peer video multicast networks.
He is on the program committee of ISADS 2009. He has been an associate editor of IEICE Transactions on Communications since 2005, and a guest editor of special section of advances in ad hoc networks in IEICE Transaction on Communications to be published in Mar. 2009

Understanding the Role of the IP Multimedia System (IMS) for enabling converged IPTV

By Thomas Magedanz,
Director, Next Generation Networks Division @ Fraunhofer FOKUS, University
Professor @ Technical University of Berlin
magedanz@fokus.fraunhofer.de, http://www.fokus.fraunhofer.de/NGNI
Tel : +49 171 172 70 70, Fax: +493328 309 710


Session 1: IMS Basics, Architecture, and Standards

  • IMS motivation – Internet plus Telecommunications = Value added Internet?
  • IMS Drivers - Applications: Fixed Mobile Convergence, NGN, Triple Play, IPTV, Web2.0
  • IMS Architecture Principles
  • IMS Core Layer Key interfaces and interactions
  • IMS Application Layer Server Options (CAMEL, OSA, SIP AS)
  • Service Provisioning in the IMS – IMS Integration with SDPs and OSS/BSS
  • IMS Standard Review - 3GPP IMS, 3GPP2 MMD, ETSI TISPAN NGN, Packet Cable IMS, A-IMS
  • Towards IMS Tools and Testbeds: Open Source IMS and Open IMS Playground ( www.open-ims.org )

Session 2: IMS and IPTV: Towards Interactive TV and Media Services

  • IPTV Standards and IPTV Implementation Options
  • IMS-based IPTV Architecture – Integrating communications and media delivery
  • Service Examples and features for IMS-based IPTV – the “Virtual Sofa”
  • Experiences and prototypes from the FOKUS Media Interoperability Lab (www.mediainteroperabilitylab.org)

Session 3: Questions & Answers

About speaker

Thomas Magedanz (PhD) is full professor in the electrical engineering and computer sciences faculty at the Technical University of Berlin, Germany, leading the chair for next generation networks ( www.av.tu-berlin.de ) . In addition, he is director of the “next generation network” division of the Fraunhofer Institute FOKUS ( www.fokus.fraunhofer.de/NGNI ) , which also provides a national Next Generation Network testbed in Germany . Since more than 18 years he is working in the convergence field of fixed and mobile telecommunications, the internet and information technologies, which resulted in many industry driven R&D projects centred around Next Generation Service Delivery platforms. In the course of his research activities he published more than 200 technical papers/articles. In addition, Prof Magedanz is senior member of the IEEE, editorial board member of several journals.

Based on his long experience in the teaching complex IT and telecommunication technologies to different customer segments in an easy to digest way, Prof. Magedanz is a globally recognised technology coach. His employments as university professor and division head of a major German R&D organisation make him a prime choice for such trainings, as he is able to provide a non-biased presentation of the technologies. He regularly provides strategic and technology briefings for many tier 1 and 2 operators and major international telecom vendors. As well, he acts often as invited tutorial speaker at major telecom conferences and workshops around the world.

In 2006, Prof Magedanz has been assigned as Extraordinary Professor at the Department of Electrical Engineering of the University of Cape Town, South Africa ( www.ee.uct.ac.za ) and as Extraordinary Professor at the Department of Electrical Engineering and Computer Engineering of the Faculty of Engineering, Built Environment & Information Technology at the University of Pretoria, South Africa ( www.ee.up.ac.za/en ).

Since 2007, he is also Visiting Professor to the Department of Mathematics, Physics and Computing, Waterford Institute of Technology in Waterford , Ireland ( http://www.wit.ie ).

Distributed Space-Time Coding in Cooperative Wireless Networks

By Prof. H. Ha Nguyen
Department of Electrical & Computer Engineering
University of Saskatchewan
57 Campus Drive , Saskatoon , SK , CANADA S7N 5A9
Phone: 306-9665383, Fax: 306-9665407


Wireless transmission is often error prone due to multipath fading. It is now well known that multiple antennas can greatly increase the capacity and reliability of a wireless communication link in a fading environment. In a nutshell, the independent paths or channels between the transmit and receive antennas provide spatial diversity, which can be exploited by well-designed space–time coding techniques. Achieving spatial diversity, however, requires multiple antennas be placed sufficiently far apart, which can be problematic for size-limited communication terminals.

In a wireless network, independent paths between the transmitter and receiver also exist when the multiple users in the network act as relays for each other. Recently, there has been a growing interest in exploiting the spatial diversity provided by antennas of different users to improve the reliability and capacity of transmission in a wireless network. This approach is called cooperative diversity since spatial diversity is achieved by having different users in the network cooperate in some way. This tutorial first describes the most two basic cooperative strategies known as amplify-and-forward and decode-and-forward. It then explains how some existing space-time codes designed for a co-located antenna system can be applied to a wireless network. The last part of the tutorial focuses on new designs of practical distributed space-time codes where both cases of full and partial channel information at the relays are considered.


About speaker

Dr. Ha H. Nguyen received the B.Eng. degree from the Hanoi University of Technology (HUT), Hanoi , Vietnam , in 1995, the M.Eng. degree from the Asian Institute of Technology (AIT), Bangkok, Thailand, in 1997, and the Ph.D. degree from the University of Manitoba, Winnipeg, MB, Canada, in 2001, all in electrical engineering. He joined the Department of Electrical and Computer Engineering, University of Saskatchewan , Saskatoon , SK , Canada , in 2001, and became a Full Professor in 2007. He holds adjunct appointments at the Department of Electrical and Computer Engineering, University of Manitoba , Winnipeg , MB , Canada , and TRLabs, Saskatoon , SK , Canada . His research interests include spread spectrum systems, error-control coding and diversity techniques in wireless communications. Dr. Nguyen currently serves as an Associate Editor for the IEEE TRANSACTIONS ON WIRELESS COMMUNICATIONS and the IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY. He is a Registered Member of the Association of Professional Engineers and Geoscientists of Saskatchewan (APEGS).

The Road to Nanotechnology: Moore Law

By Prof. Bich-Yen Nguyen


The concept of shrinking semiconductor device dimensions has been the mainstay of CMOS Integrated circuit over many generations of technology since 1968 and continues today relatively unabated. However, the International Technology Roadmap for Semiconductors (ITRS) highlights major challenges in the continued shrinking of the classical planar CMOS transistor. The 2005 ITRS had identified numerous issues currently without known solutions - so called "red brick wall" – thus making it difficult for semiconductor communities to generate or define device specification and ultimately difficult to continue Moore Law.

Some of the major issues associated with shrinking device dimensions include accurate nanometer gate length control, off-state current leakage resulting in increased power consumption, insulator thickness of atomic dimensions and its associated current leakage, degraded carrier mobility, random dopant fluctuations etc.

With these challenges in mind, scientists have made much progress in recent years to overcome the scaling limitations of classical planar CMOS transistors and maintain historical performance trend. New innovations are pushing CMOS transistors to their ultimate limits, beyond any previous predictions, to effectively meeting the incessant demand for higher density, performance, power and most importantly at lower cost.

This presentation will discuss the development progress and implication of novel material and device architecture for scaling semiconductor devices into Nanometer Era

About speaker

Bich-Yen Nguyen recently join Soitec as a Senior Fellow representing Soitec's R&D and supporting the development of new fields and applications for Soitec's core technologies. Prior to joining Soitec, Bich-Yen was a Senior Manager at Freescale Semiconductor and a Freescale/Motorola Dan Noble Fellow. Bich-Yen has been recognized for her leadership and research in developing Freescale/Motorola's CMOS technology for advanced integrated circuit products. Her honors and awards include recipient of Distinguished Innovation award in 1991, Motorola Science Advisory Board Associate in 1992, High Impact Technology Award in 1997, Dan Noble Fellow in 2001, Master of Innovation Award in 2003. In 2004, she received the 1 st National Award “Women in Technology Lifetime Achievement Award” . She holds over 130 worldwide patents and has authored more than 100 technical papers on IC process, integration and device technologies.  She gave several invited talks, panel discussion and keynote speaker at the major international conference and university. She also served as a committee member for IEDM, SISC, ECS conferences.

Field-Programmable Gate Array Technology

By Prof. Stephen Brown
Dept. of Electrical and Computer Engineering
10 Kings College Road,
University of Toronto
Toronto, CANADA - M5S 1A4
Phone: (416) 978-1647, Fax: (416) 971-2326


Over the past several years FPGA technology has advanced rapidly, to the point where FPGA chips are now used to implement entire high-performance digital systems. Today's most advanced FPGA devices can implement millions of equivalent logic gates, may contain megabytes of memory cells, and support serial communications standards above 1 GHz. FPGAs are widely used in many industries, including consumer equipment, automotive, medical and industrial test, computers and storage, video processing and broadcasting, and wireless and wired communications equipment. FPGAs are now found in almost all digital electronics equipment produced around the world.

This tutorial gives an overview of FPGA technology, including both the low-cost (tens of dollars) and high-performance (thousands of dollars) FPGA chips available, and the many types of CAD tools that are provided to aid in the design process. CAD tools covered will include the traditional back-end place and route solutions, as well as the more advanced system-level tools that allow designers to more quickly piece together circuits by making use of predeveloped intellectual property cores. The tutorial will also describe the research challenges facing FPGA manufacturers, including power, performance, and usability, and will show how the manufacturers are continuing to find innovative solutions to these issues.

The tutorial will describe Altera FPGA and CAD technology as an example of a leading technology driver--Altera Corporation offers the highest performance FPGAs in the industry, as well as world-leading low-cost FPGA devices. Altera CAD tools are also world-class and offer the simplest interface that encourages high productivity. Finally, the training material available in Altera's world-leading University Program will be described, as it provides a simple yet powerful means of introducing new designers to the exciting world of FPGA technology.

About speaker

Prof. Stephen Brown received the Ph.D and M.A.Sc degrees in Electrical Engineering from the University of Toronto, and his B.A.Sc degree in Electrical Engineering from the University of New Brunswick. He joined the University of Toronto faculty in 1992, where he is now a tenured Professor in the Department of Electrical & Computer Engineering. He is also Senior Director at the Altera Toronto Technology Center, a world-leading research and development site for CAD software and FPGA architectures. 

His research interests include field-programmable VLSI technology, CAD algorithms, and computer architecture. He won the Canadian Natural Sciences and Engineering Research Councils 1992 Doctoral Prize for the best Ph.D. thesis in Canada.

He has won multiple awards for excellence in teaching electrical engineering, computer engineering, and computer science courses. He is a coauthor of more than 60 scientific research papers and three textbooks: : Fundamentals of Digital Logic with Verilog Design (2nd Edition), Fundamentals of Digital Logic with VHDL Design (2nd Edition) , and Field-Programmable Gate Arrays.

Planar waveguide arrays for millimeter wave communications and Toky Tech Campus model network

Makoto Ando
Department of Electrcial & Electronic Engineering,Tokyo Institute of Technology
S3-19, 2-12-1 Ookayama, Meguro-ku, Tokyo 152-8552, Japan, mando@antenna.ee.titech.ac.jp


Four types of single layer waveguide arrays are developed in Tokyo Tech. Key features as well as the advantages in terms of fabrication costs have been demonstrated. Millimetre wave test systems, utilizing these antennas are now developed in Tokyo Tech Oookayama campus. It is a project, which covers CMOS technology as well.


Basic theory for antenna engineering will be briefly summarized. Unique feature of waveguide arrays are explained for millimeter wave wireless systems. Modelling of electrically large structures into the canonical problems is also mentioned.


We have developed single mode waveguides and oversized waveguides for potentially mass producible planar arrays. These arrays can cover very high gain ranging up to 35 dBi which is not attainable by planar arrays using microstrip and triplate with larger line loss. The high potential of the single-layer waveguide arrays in high gain and high frequency applications is fully demonstrated. Four types of the arrays are designed, measured and commercialized. These are,


System applications of the waveguide arrays are presented. The large scale project “RF Coexisting Technology on High Speed Baseband IC for Millimeter Wave Radio Systems” is supported by Ministry of Internal Affairs and Communications (MIC) funding as well as Industry’s participation. It started in FY2007 and will run until FY2011. The objective of this project is to develop RF coexisting technology on high speed baseband CMOS for Millimeter wave radio systems. Outdoor and indoor millimeter wave radio communication systems beyond Gbps are designed based upon these ICs, the former of which will be demonstrated in Tokyo Tech Ookayama campus.

About speaker

Makoto ANDO received the B.S., M.S. and D.E. degrees from Tokyo Institute of Technology(Tokyo Tech), Japan in 1974, 1976 and 1979, respectively. From 1979 to 1983, he worked at Yokosuka ECL, NTT. He was a Research Associate at Tokyo Tech from 1973 to 1985, and is currently a Professor. He is also serving as the Program Officer for JSPS since 2007. He served as the Chair of ISAP2007.

He also served as the technical program Co-chair for the 2007 IEEE AP-S Symposium. He was the Chair of 2004 URSI EMT Symposium.

He served as the guest editor and the guest editor-in-chief for seven special issues in Radio Science, IEEE Trans. AP and IEICE Transactions since 2001.

He served as the Chair of Commission B of URSI, 2002-2005, the AdCom member of IEEE Antennas and Propagation Society 2004-2006. He was also the member of Scientific Council for Antenna Centre of Excellence in EU’s 6’th framework programme 2004-2007. He is currently the president of IEICE Electronics Society, the 2008 President-elect of IEEE Antennas and Propagation Society. He is the member of IEE, IEICE Japan and is the Fellow, IEEE


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